1. Field of the Invention
This invention relates to a memory array, and more particularly, a multi-time programmable nonvolatile memory array that is capable of performing a byte erase operation.
2. Description of the Prior Art
An electrically rewritable nonvolatile memory is a type of memory that retains information it stores even when no power is supplied to memory blocks and allows on-board rewriting of a program. Due to the wide range of applications for various uses, there is a growing need for a nonvolatile memory to be embedded in the same chip with the main circuit, especially for personal electronic devices having strict requirements for circuit area.
A nonvolatile memory cell of prior art comprises one floating gate transistor for retaining data, and one or two select transistors for enabling the floating gate transistor to perform corresponding operations. The floating gate may be controlled by coupling elements for program operations and erase operations.
Since memory cells in different pages or sectors should be controlled independently, memory cells indifferent pages or sectors are usually disposed in isolated regions when the operations of the memory cells involves in changing of well(body) bias. However, due to the spacing rule of the manufacture, the spare area between different isolated regions can significantly increase the circuit area on silicon. Furthermore, for system requiring byte operations, such as byte program or byte erase, may further complicate the control signals received by memory cell and make the area sharing even more difficult. Therefore, how to reduce the circuit area and use the circuit area more efficiently has become an issue to be solved.